set_property IOSTANDARD LVCMOS33 [get_ports {ck_io[19]}]
set_property IOSTANDARD LVCMOS33 [get_ports {ck_io[18]}]
set_property IOSTANDARD LVCMOS33 [get_ports {ck_io[17]}]
set_property IOSTANDARD LVCMOS33 [get_ports {ck_io[16]}]
set_property IOSTANDARD LVCMOS33 [get_ports {ck_io[15]}]
set_property IOSTANDARD LVCMOS33 [get_ports {ck_io[14]}]
set_property IOSTANDARD LVCMOS33 [get_ports {ck_io[13]}]
set_property IOSTANDARD LVCMOS33 [get_ports {ck_io[12]}]
set_property IOSTANDARD LVCMOS33 [get_ports {ck_io[11]}]
set_property IOSTANDARD LVCMOS33 [get_ports {ck_io[10]}]
set_property IOSTANDARD LVCMOS33 [get_ports {ck_io[9]}]
set_property IOSTANDARD LVCMOS33 [get_ports {ck_io[8]}]
set_property IOSTANDARD LVCMOS33 [get_ports {ck_io[7]}]
set_property IOSTANDARD LVCMOS33 [get_ports {ck_io[6]}]
set_property IOSTANDARD LVCMOS33 [get_ports {ck_io[5]}]
set_property IOSTANDARD LVCMOS33 [get_ports {ck_io[4]}]
set_property IOSTANDARD LVCMOS33 [get_ports {ck_io[3]}]
set_property IOSTANDARD LVCMOS33 [get_ports {ck_io[2]}]
set_property IOSTANDARD LVCMOS33 [get_ports {ck_io[1]}]
set_property IOSTANDARD LVCMOS33 [get_ports {ck_io[0]}]
set_property IOSTANDARD LVCMOS33 [get_ports {qspi_dq[3]}]
set_property IOSTANDARD LVCMOS33 [get_ports {qspi_dq[2]}]
set_property IOSTANDARD LVCMOS33 [get_ports {qspi_dq[1]}]
set_property IOSTANDARD LVCMOS33 [get_ports {qspi_dq[0]}]

set_property IOSTANDARD LVCMOS33 [get_ports btn_0]
set_property IOSTANDARD LVCMOS33 [get_ports btn_1]
set_property IOSTANDARD LVCMOS33 [get_ports btn_2]
set_property IOSTANDARD LVCMOS33 [get_ports uart_txd_in]
set_property IOSTANDARD LVCMOS33 [get_ports ck_miso]
set_property IOSTANDARD LVCMOS33 [get_ports ck_mosi]
set_property IOSTANDARD LVCMOS33 [get_ports sw_0]
set_property IOSTANDARD LVCMOS33 [get_ports ck_sck]
set_property IOSTANDARD LVCMOS33 [get_ports ck_ss]
set_property IOSTANDARD LVCMOS33 [get_ports ja_0]
set_property IOSTANDARD LVCMOS33 [get_ports ja_1]
set_property IOSTANDARD LVCMOS33 [get_ports jtag_tdo]
set_property IOSTANDARD LVCMOS33 [get_ports uart_rxd_out]
set_property IOSTANDARD LVCMOS33 [get_ports sw_3]
set_property IOSTANDARD LVCMOS33 [get_ports sw_2]
set_property IOSTANDARD LVCMOS33 [get_ports led0_b]
set_property IOSTANDARD LVCMOS33 [get_ports led0_g]
set_property IOSTANDARD LVCMOS33 [get_ports led0_r]
set_property IOSTANDARD LVCMOS33 [get_ports led1_b]
set_property IOSTANDARD LVCMOS33 [get_ports led1_g]
set_property IOSTANDARD LVCMOS33 [get_ports led1_r]
set_property IOSTANDARD LVCMOS33 [get_ports led2_b]
set_property IOSTANDARD LVCMOS33 [get_ports led2_g]
set_property IOSTANDARD LVCMOS33 [get_ports led2_r]
set_property IOSTANDARD LVCMOS33 [get_ports led_0]
set_property IOSTANDARD LVCMOS33 [get_ports led_1]
set_property IOSTANDARD LVCMOS33 [get_ports sw_1]
set_property IOSTANDARD LVCMOS33 [get_ports led_3]
set_property IOSTANDARD LVCMOS33 [get_ports qspi_cs]
set_property IOSTANDARD LVCMOS33 [get_ports qspi_sck]
set_property IOSTANDARD LVCMOS33 [get_ports ck_rst]
set_property IOSTANDARD LVCMOS33 [get_ports btn_3]
set_property IOSTANDARD LVCMOS33 [get_ports jtag_clk]
set_property IOSTANDARD LVCMOS33 [get_ports jtag_tdi]
set_property IOSTANDARD LVCMOS33 [get_ports jtag_tms]
set_property IOSTANDARD LVCMOS33 [get_ports led_2]
set_property DRIVE 4 [get_ports {ck_io[19]}]
set_property DRIVE 4 [get_ports {ck_io[18]}]
set_property DRIVE 4 [get_ports {ck_io[17]}]
set_property DRIVE 4 [get_ports {ck_io[16]}]
set_property DRIVE 4 [get_ports {ck_io[15]}]
set_property DRIVE 4 [get_ports {ck_io[14]}]
set_property DRIVE 4 [get_ports {ck_io[13]}]
set_property DRIVE 4 [get_ports {ck_io[12]}]
set_property DRIVE 4 [get_ports {ck_io[11]}]
set_property DRIVE 4 [get_ports {ck_io[10]}]
set_property DRIVE 4 [get_ports {ck_io[9]}]
set_property DRIVE 4 [get_ports {ck_io[8]}]
set_property DRIVE 4 [get_ports {ck_io[7]}]
set_property DRIVE 4 [get_ports {ck_io[6]}]
set_property DRIVE 4 [get_ports {ck_io[5]}]
set_property DRIVE 4 [get_ports {ck_io[4]}]
set_property DRIVE 4 [get_ports {ck_io[3]}]
set_property DRIVE 4 [get_ports {ck_io[2]}]
set_property DRIVE 4 [get_ports {ck_io[1]}]
set_property DRIVE 4 [get_ports {ck_io[0]}]
set_property DRIVE 4 [get_ports {qspi_dq[3]}]
set_property DRIVE 4 [get_ports {qspi_dq[2]}]
set_property DRIVE 4 [get_ports {qspi_dq[1]}]
set_property DRIVE 4 [get_ports {qspi_dq[0]}]
set_property DRIVE 4 [get_ports btn_0]
set_property DRIVE 4 [get_ports btn_1]
set_property DRIVE 4 [get_ports btn_2]
set_property DRIVE 4 [get_ports ck_miso]
set_property DRIVE 4 [get_ports ck_mosi]
set_property DRIVE 4 [get_ports sw_0]
set_property DRIVE 4 [get_ports ck_sck]
set_property DRIVE 4 [get_ports ck_ss]
set_property DRIVE 4 [get_ports ja_0]
set_property DRIVE 4 [get_ports ja_1]
set_property DRIVE 4 [get_ports jtag_tdo]
set_property DRIVE 4 [get_ports uart_rxd_out]
set_property DRIVE 4 [get_ports sw_3]
set_property DRIVE 4 [get_ports sw_2]
set_property DRIVE 4 [get_ports led0_b]
set_property DRIVE 4 [get_ports led0_g]
set_property DRIVE 4 [get_ports led0_r]
set_property DRIVE 4 [get_ports led1_b]
set_property DRIVE 4 [get_ports led1_g]
set_property DRIVE 4 [get_ports led1_r]
set_property DRIVE 4 [get_ports led2_b]
set_property DRIVE 4 [get_ports led2_g]
set_property DRIVE 4 [get_ports led2_r]
set_property DRIVE 4 [get_ports led_0]
set_property DRIVE 4 [get_ports led_1]
set_property DRIVE 4 [get_ports sw_1]
set_property DRIVE 4 [get_ports led_3]
set_property DRIVE 4 [get_ports qspi_cs]
set_property DRIVE 4 [get_ports qspi_sck]
set_property DRIVE 4 [get_ports btn_3]
set_property DRIVE 4 [get_ports led_2]
set_property SLEW SLOW [get_ports {ck_io[19]}]
set_property SLEW SLOW [get_ports {ck_io[18]}]
set_property SLEW SLOW [get_ports {ck_io[17]}]
set_property SLEW SLOW [get_ports {ck_io[16]}]
set_property SLEW SLOW [get_ports {ck_io[15]}]
set_property SLEW SLOW [get_ports {ck_io[14]}]
set_property SLEW SLOW [get_ports {ck_io[13]}]
set_property SLEW SLOW [get_ports {ck_io[12]}]
set_property SLEW SLOW [get_ports {ck_io[11]}]
set_property SLEW SLOW [get_ports {ck_io[10]}]
set_property SLEW SLOW [get_ports {ck_io[9]}]
set_property SLEW SLOW [get_ports {ck_io[8]}]
set_property SLEW SLOW [get_ports {ck_io[7]}]
set_property SLEW SLOW [get_ports {ck_io[6]}]
set_property SLEW SLOW [get_ports {ck_io[5]}]
set_property SLEW SLOW [get_ports {ck_io[4]}]
set_property SLEW SLOW [get_ports {ck_io[3]}]
set_property SLEW SLOW [get_ports {ck_io[2]}]
set_property SLEW SLOW [get_ports {ck_io[1]}]
set_property SLEW SLOW [get_ports {ck_io[0]}]
set_property SLEW SLOW [get_ports {qspi_dq[3]}]
set_property SLEW SLOW [get_ports {qspi_dq[2]}]
set_property SLEW SLOW [get_ports {qspi_dq[1]}]
set_property SLEW SLOW [get_ports {qspi_dq[0]}]
set_property SLEW SLOW [get_ports btn_0]
set_property SLEW SLOW [get_ports btn_1]
set_property SLEW SLOW [get_ports btn_2]
set_property SLEW SLOW [get_ports ck_miso]
set_property SLEW SLOW [get_ports ck_mosi]
set_property SLEW SLOW [get_ports sw_0]
set_property SLEW SLOW [get_ports ck_sck]
set_property SLEW SLOW [get_ports ck_ss]
set_property SLEW SLOW [get_ports ja_0]
set_property SLEW SLOW [get_ports ja_1]
set_property SLEW SLOW [get_ports jtag_tdo]
set_property SLEW SLOW [get_ports uart_rxd_out]
set_property SLEW SLOW [get_ports sw_3]
set_property SLEW SLOW [get_ports sw_2]
set_property SLEW SLOW [get_ports led0_b]
set_property SLEW SLOW [get_ports led0_g]
set_property SLEW SLOW [get_ports led0_r]
set_property SLEW SLOW [get_ports led1_b]
set_property SLEW SLOW [get_ports led1_g]
set_property SLEW SLOW [get_ports led1_r]
set_property SLEW SLOW [get_ports led2_b]
set_property SLEW SLOW [get_ports led2_g]
set_property SLEW SLOW [get_ports led2_r]
set_property SLEW SLOW [get_ports led_0]
set_property SLEW SLOW [get_ports led_1]
set_property SLEW SLOW [get_ports sw_1]
set_property SLEW SLOW [get_ports led_3]
set_property SLEW SLOW [get_ports qspi_cs]
set_property SLEW SLOW [get_ports qspi_sck]
set_property SLEW SLOW [get_ports btn_3]
set_property SLEW SLOW [get_ports led_2]
set_property PACKAGE_PIN K13 [get_ports sw_3]
set_property PACKAGE_PIN R15 [get_ports btn_3]
set_property PACKAGE_PIN P15 [get_ports led_2]
set_property PACKAGE_PIN L5 [get_ports led0_g]
set_property PACKAGE_PIN P5 [get_ports led0_r]
set_property PACKAGE_PIN N12 [get_ports led1_b]
set_property PACKAGE_PIN T9 [get_ports led1_g]
set_property PACKAGE_PIN T10 [get_ports led1_r]
set_property PACKAGE_PIN D10 [get_ports led2_b]
set_property PACKAGE_PIN P6 [get_ports led2_g]
set_property PACKAGE_PIN K12 [get_ports led2_r]
set_property PACKAGE_PIN M16 [get_ports led_0]
set_property PACKAGE_PIN N16 [get_ports led_1]
set_property PACKAGE_PIN P16 [get_ports led_3]

set_property PACKAGE_PIN C11 [get_ports {ck_io[19]}]
set_property PACKAGE_PIN D9 [get_ports {ck_io[18]}]
set_property PACKAGE_PIN D8 [get_ports {ck_io[17]}]
set_property PACKAGE_PIN R7 [get_ports {ck_io[10]}]
set_property PACKAGE_PIN R10 [get_ports {ck_io[7]}]
set_property PACKAGE_PIN R11 [get_ports {ck_io[6]}]
set_property PACKAGE_PIN N13 [get_ports {ck_io[5]}]
set_property PACKAGE_PIN P13 [get_ports {ck_io[4]}]
set_property PACKAGE_PIN E13 [get_ports ja_1]
set_property PACKAGE_PIN M1 [get_ports jtag_tdo]
set_property PACKAGE_PIN N11 [get_ports jtag_clk]
set_property PACKAGE_PIN N2 [get_ports jtag_tdi]
set_property PACKAGE_PIN N3 [get_ports jtag_tms]
set_property PACKAGE_PIN B11 [get_ports {ck_io[16]}]
set_property PACKAGE_PIN L14 [get_ports sw_2]
set_property PACKAGE_PIN M14 [get_ports sw_1]
set_property PACKAGE_PIN T15 [get_ports sw_0]
set_property PACKAGE_PIN M15 [get_ports btn_0]
set_property PACKAGE_PIN T14 [get_ports btn_1]
set_property PACKAGE_PIN R16 [get_ports btn_2]

set_property PACKAGE_PIN D14 [get_ports ck_sck]

set_property PACKAGE_PIN D11 [get_ports {ck_io[11]}]
set_property PACKAGE_PIN M12 [get_ports {ck_io[14]}]
set_property PACKAGE_PIN B10 [get_ports {ck_io[15]}]
set_property PACKAGE_PIN E12 [get_ports ja_0]
set_property PACKAGE_PIN C12 [get_ports {ck_io[1]}]

set_property PACKAGE_PIN D15 [get_ports ck_ss]


#set_property C_CLK_INPUT_FREQ_HZ 300000000 [get_debug_cores dbg_hub]
#set_property C_ENABLE_CLK_DIVIDER false [get_debug_cores dbg_hub]
#set_property C_USER_SCAN_CHAIN 1 [get_debug_cores dbg_hub]
#connect_debug_port dbg_hub/clk [get_nets clk_ila]
set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 4 [current_design]

set_property PACKAGE_PIN M2 [get_ports led0_b]






set_property IOSTANDARD LVCMOS33 [get_ports UART_rxd]
set_property IOSTANDARD LVCMOS33 [get_ports UART_txd]
set_property PACKAGE_PIN P9 [get_ports UART_rxd]
set_property PACKAGE_PIN R2 [get_ports uart_rxd_out]
set_property PACKAGE_PIN R1 [get_ports uart_txd_in]
set_property PACKAGE_PIN M6 [get_ports ck_mosi]

set_property PACKAGE_PIN N9 [get_ports UART_txd]

set_property PACKAGE_PIN J7 [get_ports Vp_Vn_v_n]

set_property PACKAGE_PIN F12 [get_ports pwm0]
set_property IOSTANDARD LVCMOS33 [get_ports pwm0]
set_property PACKAGE_PIN N1 [get_ports spi_0_io0_io]
set_property PACKAGE_PIN P1 [get_ports spi_0_io1_io]
set_property PACKAGE_PIN P4 [get_ports spi_0_io2_io]
set_property PACKAGE_PIN P3 [get_ports spi_0_io3_io]
set_property PACKAGE_PIN M5 [get_ports spi_0_ss_io]
set_property PACKAGE_PIN N4 [get_ports spi_0_sck_io]
set_property IOSTANDARD LVCMOS33 [get_ports spi_0_io0_io]
set_property IOSTANDARD LVCMOS33 [get_ports spi_0_io1_io]
set_property IOSTANDARD LVCMOS33 [get_ports spi_0_io2_io]
set_property IOSTANDARD LVCMOS33 [get_ports spi_0_io3_io]
set_property IOSTANDARD LVCMOS33 [get_ports spi_0_sck_io]
set_property IOSTANDARD LVCMOS33 [get_ports spi_0_ss_io]

set_property PACKAGE_PIN R6 [get_ports spi_1_io1_io]
set_property PACKAGE_PIN R5 [get_ports spi_1_sck_io]
set_property PACKAGE_PIN T13 [get_ports spi_1_ss_io]
set_property PACKAGE_PIN T8 [get_ports iic_sda_io]
set_property PACKAGE_PIN T7 [get_ports iic_scl_io]
set_property IOSTANDARD LVCMOS33 [get_ports iic_scl_io]
set_property IOSTANDARD LVCMOS33 [get_ports iic_sda_io]
set_property IOSTANDARD LVCMOS33 [get_ports spi_1_io0_io]
set_property IOSTANDARD LVCMOS33 [get_ports spi_1_io1_io]
#set_property IOSTANDARD LVCMOS33 [get_ports spi_1_io2_io]
#set_property IOSTANDARD LVCMOS33 [get_ports spi_1_io3_io]
set_property IOSTANDARD LVCMOS33 [get_ports spi_1_sck_io]
set_property IOSTANDARD LVCMOS33 [get_ports spi_1_ss_io]
set_property PACKAGE_PIN A9 [get_ports {ck_io[12]}]
set_property PACKAGE_PIN R13 [get_ports {ck_io[9]}]
set_property PACKAGE_PIN A12 [get_ports {ck_io[13]}]

set_property PULLUP true [get_ports spi_0_io0_io]
set_property PULLUP true [get_ports spi_0_io1_io]
set_property PULLUP true [get_ports spi_0_io2_io]
set_property PULLUP true [get_ports spi_0_io3_io]
set_property DRIVE 4 [get_ports spi_0_io0_io]
set_property DRIVE 4 [get_ports spi_0_io1_io]
set_property DRIVE 4 [get_ports spi_0_io2_io]
set_property DRIVE 4 [get_ports spi_0_io3_io]
set_property DRIVE 4 [get_ports spi_0_sck_io]
set_property DRIVE 4 [get_ports spi_0_ss_io]

set_property PACKAGE_PIN F13 [get_ports pwm1]
set_property IOSTANDARD LVCMOS33 [get_ports pwm1]
set_property DRIVE 12 [get_ports pwm1]

set_property PACKAGE_PIN N6 [get_ports ck_miso]

set_property PACKAGE_PIN C16 [get_ports {ck_io[8]}]
set_property PACKAGE_PIN C14 [get_ports {ck_io[3]}]
set_property PACKAGE_PIN C13 [get_ports {ck_io[2]}]
set_property PACKAGE_PIN D16 [get_ports {ck_io[0]}]

set_property PACKAGE_PIN E16 [get_ports {qspi_dq[3]}]
set_property PACKAGE_PIN F15 [get_ports {qspi_dq[2]}]
set_property PACKAGE_PIN G16 [get_ports {qspi_dq[1]}]
set_property PACKAGE_PIN H16 [get_ports {qspi_dq[0]}]
set_property PACKAGE_PIN J16 [get_ports qspi_cs]
set_property PACKAGE_PIN J15 [get_ports qspi_sck]
set_property PACKAGE_PIN L13 [get_ports ck_rst]

set_property PACKAGE_PIN T5 [get_ports spi_1_io0_io]
set_property DRIVE 12 [get_ports spi_1_sck_io]
#set_property C_CLK_INPUT_FREQ_HZ 300000000 [get_debug_cores dbg_hub]
#set_property C_ENABLE_CLK_DIVIDER false [get_debug_cores dbg_hub]
#set_property C_USER_SCAN_CHAIN 1 [get_debug_cores dbg_hub]
#connect_debug_port dbg_hub/clk [get_nets clk]

set_property IOSTANDARD LVCMOS33 [get_ports Vaux1_0_v_n]
set_property IOSTANDARD LVCMOS33 [get_ports Vaux1_0_v_p]
set_property IOSTANDARD LVCMOS33 [get_ports Vaux2_0_v_n]
set_property IOSTANDARD LVCMOS33 [get_ports Vaux2_0_v_p]
set_property IOSTANDARD LVCMOS33 [get_ports Vaux9_0_v_n]
set_property IOSTANDARD LVCMOS33 [get_ports Vaux9_0_v_p]
set_property IOSTANDARD LVCMOS33 [get_ports Vaux10_0_v_n]
set_property IOSTANDARD LVCMOS33 [get_ports Vaux10_0_v_p]
set_property PACKAGE_PIN K15 [get_ports {ck_io[13]}]
set_property PACKAGE_PIN K16 [get_ports {ck_io[3]}]


set_property IOSTANDARD LVCMOS33 [get_ports CLK]
set_property PACKAGE_PIN N14 [get_ports CLK]
